3 Digit Counter Electronic Project Schematic
The 3 Digit Counter Electronic Project Schematic uses two 14553 IC's. The 14553 is a 3-digit BCD (binary coded decimal) counter. Inside the chip, each counter drives a 4-bit latch which quad 3 input multiplexer. The chip has Carry, Reset, an input clock and Latch Enable. The 1nF mylar capacitor on pins 3 and 4 sets the multiplex scan rate to about 1 kHz.
The four outputs (Q0 to Q3) are fed into the 14511 cmos 7-segment decoder driver. The outputs of this driver then go to the 3-digit multiplexed display unit. Each digit is turned on at the correct time via the display control outputs at pins 2, 1 and 25 of the 14553. They are active low outputs. Each drives a BC557 pnp transistor via a 4k7 resistor. The transistors in turn switch the common cathode of the digits in the display.
The counter module is a typical debounce circuit. The resistance and capacitor provide a delay period during which the noise of the switch connection will not register a 'count'. The hatkey switch used are very noisy switches but this debounce circuit take care of the problem for as fast as manual pressing will allow. Digital inputs from other sources may be routed through the board but the debounce circuit will have to be changed if the input frequency is higher than 100 to 150 Hz (cycles / second.)Further detailed of the Electronic Project Schematic 14511, 14553 and 14093 specifications can be obtained from ON Semiconductor website.
Parts List
